The present invention relates to a semiconductor device including a gate electrode and a method for fabricating the device.
Recently, as semiconductor devices have been downsized drastically and as the number of devices integrated on a chip has been increasing steeply, dual-gate CMOSFETs (complementary metal-oxide semiconductor field-effect transistors) have been used more and more widely.
Hereinafter, a p-channel MOSFET included in a known dual-gate CMOS device will be described as a typical known semiconductor device with reference to FIG. 11.
As shown in FIG. 11, a gate electrode 3 of polysilicon is formed over a semiconductor substrate 1 of silicon with a gate insulating film 2 interposed between them. Normally, the gate electrode 3 is doped with a dopant, e.g., boron (B), by an ion implantation technique. The boron ions are implanted into a polysilicon film, of which the gate electrode 3 will be made, at an energy low enough to form a boron concentration profile in the gate electrode 3 with one of its peaks located near the upper surface thereof and to prevent the boron atoms from penetrating through the gate insulating film 2 into the semiconductor substrate 1.
In this case, if the polysilicon film to be the gate electrode 3 is annealed after having been doped with boron, the boron atoms in the polysilicon film diffuse toward the semiconductor substrate 1. Any inappropriate condition for the annealing process causes the boron atoms in the polysilicon film to permeate through the gate insulating film 2 in the semiconductor substrate 1. Then, the dopant concentration in the semiconductor substrate 1 changes to degrade the device characteristics. Also, where a metal layer is deposited on the polysilicon film to form a poly-metal gate electrode and then a silicon nitride film to be a hard mask is deposited on the metal layer and annealed or where a silicon nitride film to be a sidewall is deposited on the gate electrode 3 and annealed, the permeation of the boron atoms into the semiconductor substrate 1 is observed noticeably.
To suppress the boron atoms from permeating the semiconductor substrate 1, various measures have been taken; a silicon oxynitride film that can suppress the boron atom permeation to a certain degree is adopted as the gate insulating film 2.
However, even if the silicon oxynitride film is used as the gate insulating film 2, the boron atom permeation is not completely suppressible. Particularly, where the silicon oxynitride film is extremely thin (less than 3 nm, for example) to catch up with performance enhancement of devices, the silicon oxynitride film can suppress the boron atom permeation just slightly to say the least.
It is therefore an object of the present invention to prevent a dopant introduced into a gate electrode from permeating a semiconductor substrate.
To achieve this object, a first inventive semiconductor device includes a gate electrode that has been formed over a semiconductor substrate with a gate insulating film interposed between the gate electrode and the substrate. The gate electrode includes: a silicon germanium layer; and an upper silicon layer that has been formed on the silicon germanium layer.
In the first inventive device, a gate electrode includes: a silicon germanium layer; and an upper silicon layer that has been formed on the silicon germanium layer. Thus, in doping the gate electrode with a dopant such as boron, the dopant can be introduced by an ion implantation process into the silicon germanium layer through the upper silicon layer. So, the dopant can be implanted sufficiently shallow while the penetration of the dopant into a semiconductor substrate, which is usually caused by a channeling phenomenon, is suppressible. Accordingly, it is possible to prevent the dopant, with which the gate electrode has been doped, from permeating the semiconductor substrate even if the gate electrode is subsequently subjected to an annealing process, for example. As a result, any variation in device characteristics, which might result from a change in dopant concentration in the semiconductor substrate, is suppressible.
Also, in the first inventive device, the bandgap of the silicon germanium layer for the gate electrode may be changed by controlling a germanium concentration in the silicon germanium layer. And the threshold voltage controllability of the gate electrode can be improved by changing the bandgap. In that case, the gate electrode does not have to be doped with any dopant. As a result, any variation in device characteristics, which might result from the permeation of a dopant from the gate electrode into the semiconductor substrate, is suppressible with more certainty.
Further, in the first inventive device, since the silicon germanium layer is covered with the upper silicon layer, cross contamination (contamination of the semiconductor substrate or a reactor), caused by germanium atoms released from the silicon germanium layer, is also suppressible. Accordingly, a process for forming a gate electrode out of silicon layers can be utilized.
In one embodiment of the present invention, the gate electrode may further include a lower silicon layer under the silicon germanium layer.
In such an embodiment, the lower silicon layer with a surface morphology better than that of the silicon germanium layer exists under the silicon germanium layer for the gate electrode. Thus, the breakdown strength of the gate insulating film can be improved compared to a situation where the silicon germanium layer and the gate insulating film are in direct contact with each other.
In another embodiment, the gate electrode may further include a metal layer on the upper silicon layer, and a silicon nitride film may have been formed over the gate electrode.
Then, the gate electrode is implementable as a poly-metal gate electrode. And even though the silicon nitride film has been formed over the gate electrode, any dopant existing in the gate electrode hardly permeates the semiconductor substrate.
In this particular embodiment, an insulating layer preferably exists between the gate electrode and the silicon nitride film.
In that case, the dopant, existing in the gate electrode, even less likely permeates the semiconductor substrate when the insulating layer is made of silicon dioxide, for example.
A second inventive semiconductor device includes a gate electrode that has been formed over a semiconductor substrate with a gate insulating film interposed between the gate electrode and the substrate. The gate electrode includes a silicon germanium layer that has been deposited in an amorphous state.
In the second inventive device, a gate electrode includes a silicon germanium layer that has been deposited in an amorphous state. Thus, in doping the gate electrode with a dopant such as boron, the dopant can be introduced by an ion implantation process into the silicon germanium layer in the amorphous state. So, the dopant can be implanted sufficiently shallow while the penetration of the dopant into a semiconductor substrate, which is usually caused by a channeling phenomenon, is suppressible. Accordingly, it is possible to prevent the dopant, with which the gate electrode has been doped, from permeating the semiconductor substrate even if the gate electrode is subsequently subjected to an annealing process, for example. As a result, any variation in device characteristics, which might result from a change in dopant concentration in the semiconductor substrate, is suppressible.
Also, in the second inventive device, the bandgap of the silicon germanium layer for the gate electrode may be changed by controlling a germanium concentration in the silicon germanium layer. And the threshold voltage controllability of the gate electrode can be improved by changing the bandgap. In that case, the gate electrode does not have to be doped with any dopant. As a result, any variation in device characteristics, which might result from the permeation of a dopant from the gate electrode into the semiconductor substrate, is suppressible with more certainty.
Further, in the second inventive device, the silicon germanium layer in the amorphous state for the gate electrode has a better surface morphology than a silicon germanium layer in a polycrystalline state. Accordingly, the silicon germanium layer has a good surface morphology near the interface with the gate insulating film. Thus, the breakdown strength of the gate insulating film improves.
Furthermore, in the second inventive device, the gate electrode may be made of the silicon germanium layer alone. For that reason, the process steps of forming the gate electrode can be simplified as compared to forming a gate electrode with a multilayer structure, and the gate electrode can also have its thickness reduced to e.g., 100 nm or less.
In one embodiment of the present invention, the gate electrode may further include a metal layer on the silicon germanium layer, and a silicon nitride film may have been formed over the gate electrode.
In such an embodiment, the gate electrode is implementable as a poly-metal gate electrode. And even though the silicon nitride film has been formed over the gate electrode, any dopant existing in the gate electrode hardly permeates the semiconductor substrate.
In this particular embodiment, an insulating layer preferably exists between the gate electrode and the silicon nitride film.
In that case, the dopant, existing in the gate electrode, even less likely permeates the semiconductor substrate when the insulating layer is made of silicon dioxide, for example.
In one embodiment of the first or second inventive device, a germanium concentration in a part of the silicon germanium layer near a lower surface thereof is preferably lower than a germanium concentration in the other part of the silicon germanium layer.
In such an embodiment, it is possible to prevent the gate insulating film from decreasing its breakdown strength or changing its characteristics while suppressing decrease in the threshold voltage controllability of the gate electrode.
In another embodiment of the first or second inventive device, the silicon germanium layer may contain boron or phosphorus.
Then, the threshold voltage controllability of the gate electrode can be improved. Also, where the silicon germanium layer contains boron, the boron atoms existing in the silicon germanium layer are activated at a higher rate than in a normal polysilicon film. Thus the boron atoms will even less likely permeate the semiconductor substrate.
In another embodiment of the first or second inventive device, a silicon nitride film may have been formed over the gate electrode with an insulating layer interposed between the gate electrode and the silicon nitride film.
Then, even though the silicon nitride film has been formed over the gate electrode, any dopant existing in the gate electrode hardly permeates the semiconductor substrate.
In another embodiment of the first or second inventive device, the gate electrode may be used as a gate electrode for at least one of two MOS transistors in a dual-gate MOS device.
Then, it is possible to prevent a dopant introduced into a p+ or n+ gate electrode for one of the two MOS transistors in the dual-gate CMOS device from permeating the semiconductor substrate. Thus, any variation in the characteristics of the dual-gate CMOS device, which might result from a change in dopant concentration in the semiconductor substrate, is suppressible. Also, the bandgap of the silicon germanium layer of the p+ or n+ gate electrode may be changed by controlling a germanium concentration in the silicon germanium layer. And the threshold voltage controllability of the p+ or n+ gate electrode can be improved by changing the bandgap. In that case, the p+ or n+ gate electrode does not have to be doped with any dopant. That is to say, just by controlling the germanium concentration in the silicon germanium layer of the p+ or n+ gate electrodes it is possible to form a dual-gate CMOS device easily while preventing the penetration or permeation of any dopant into the semiconductor substrate.
A first inventive method for fabricating a semiconductor device includes the step of a) depositing a silicon germanium layer over a semiconductor substrate with a gate insulating film interposed between the substrate and the silicon germanium layer. The method further includes the step of b) depositing an upper silicon layer in an amorphous state on the silicon germanium layer. And the method further includes the step of c) forming a gate electrode by patterning the silicon germanium layer and the upper silicon layer.
According to the first inventive method, a silicon germanium layer and an upper silicon layer in an amorphous state are deposited in this order over a semiconductor substrate with a gate insulating film interposed between the substrate and the silicon germanium layer. Then, a gate electrode is formed by patterning the silicon germanium layer and the upper silicon layer. Thus, in doping the gate electrode with a dopant such as boron, the dopant can be introduced by an ion implantation process into the silicon germanium layer through the upper silicon layer in the amorphous state. So, the dopant can be implanted sufficiently shallow while the penetration of the dopant into the semiconductor substrate, which is usually caused by a channeling phenomenon, is suppressible. Accordingly, it is possible to prevent the dopant, with which the gate electrode has been doped, from permeating the semiconductor substrate even if the gate electrode is subsequently subjected to an annealing process, for example. As a result, any variation in device characteristics, which might result from a change in dopant concentration in the semiconductor substrate, is suppressible.
Also, according to the first inventive method, the bandgap of the silicon germanium layer for the gate electrode may be changed by controlling a germanium concentration in the silicon germanium layer. And the threshold voltage controllability of the gate electrode can be improved by changing the bandgap. In that case, the gate electrode does not have to be doped with any dopant. As a result, any variation in device characteristics, which might result from the permeation of a dopant from the gate electrode into the semiconductor substrate, is suppressible with more certainty.
Further, according to the first inventive method, since the silicon germanium layer is covered with the upper silicon layer, cross contamination, caused by germanium atoms released from the silicon germanium layer, is also suppressible. Accordingly, a process for forming a gate electrode out of silicon layers can be utilized.
In one embodiment of the present invention, the first method may further include the step of depositing a lower silicon layer on the gate insulating film before the step a) is performed, and the step c) may include patterning the lower silicon layer.
In such an embodiment, the lower silicon layer with a surface morphology better than that of the silicon germanium layer exists under the silicon germanium layer for the gate electrode. Thus, the breakdown strength of the gate insulating film can be improved compared to a situation where the silicon germanium layer and the gate insulating film are in direct contact with each other.
In another embodiment, the first method may further include the step of d) depositing a metal layer and a silicon nitride film in this order on the upper silicon layer between the steps b) and c), and the step c) may include patterning the silicon nitride film and then patterning the metal layer by using the patterned silicon nitride film as a mask.
Then, the gate electrode is implementable as a poly-metal gate electrode. And even though the silicon nitride film has been formed over the gate electrode, any dopant existing in the gate electrode hardly permeates the semiconductor substrate.
In this particular embodiment, the step d) preferably includes depositing an insulating layer between the metal layer and the silicon nitride film.
In that case, the dopant, existing in the gate electrode, even less likely permeates the semiconductor substrate when the insulating layer is made of silicon dioxide, for example.
A second inventive method for fabricating a semiconductor device includes the step of a) depositing a silicon germanium layer in an amorphous state over a semiconductor substrate with a gate insulating film interposed between the substrate and the silicon germanium layer. The method further includes the step of b) forming a gate electrode by patterning the silicon germanium layer.
According to the second inventive method, a silicon germanium layer in an amorphous state is deposited over a semiconductor substrate with a gate insulating film interposed between the substrate and the silicon germanium layer. Then, a gate electrode is formed by patterning the silicon germanium layer. Thus, in doping the gate electrode with a dopant such as boron, the dopant can be introduced by an ion implantation process into the silicon germanium layer in the amorphous state. So, the dopant can be implanted sufficiently shallow while the penetration of the dopant into the semiconductor substrate, which is usually caused by a channeling phenomenon, is suppressible. Accordingly, it is possible to prevent the dopant, with which the gate electrode has been doped, from permeating the semiconductor substrate even if the gate electrode is subsequently subjected to an annealing process, for example. As a result, any variation in device characteristics, which might result from a change in dopant concentration in the semiconductor substrate, is suppressible.
Also, according to the second inventive method, the bandgap of the silicon germanium layer for the gate electrode may be changed by controlling a germanium concentration in the silicon germanium layer. And the threshold voltage controllability of the gate electrode can be improved by changing the bandgap. In that case, the gate electrode does not have to be doped with any dopant. As a result, any variation in device characteristics, which might result from the permeation of a dopant from the gate electrode into the semiconductor substrate, is suppressible with more certainty.
Further, according to the second inventive method, the silicon germanium layer in the amorphous state for the gate electrode has a better surface morphology than a silicon germanium layer in a polycrystalline state. Accordingly, the silicon germanium layer has a good surface morphology near the interface with the gate insulating film. Thus, the breakdown strength of the gate insulating film improves.
Furthermore, according to the second inventive method, the gate electrode may be made of the silicon germanium layer alone. Thus, the process steps of forming the gate electrode can be simplified as compared to forming a gate electrode with a multilayer structure, and the gate electrode can also have its thickness reduced to e.g., 100 nm or less.
In one embodiment of the present invention, the second method may further include the step of c) depositing a metal layer and a silicon nitride film in this order on the silicon germanium layer between the steps a) and b). And the step b) may include patterning the silicon nitride film and then patterning the metal layer by using the patterned silicon nitride film as a mask.
In such an embodiment, the gate electrode is implementable as a poly-metal gate electrode. And even though the silicon nitride film has been formed over the gate electrode, any dopant existing in the gate electrode hardly permeates the semiconductor substrate.
In this particular embodiment, the step c) preferably includes depositing an insulating layer between the metal layer and the silicon nitride film.
In that case, the dopant, existing in the gate electrode, even less likely permeates the semiconductor substrate when the insulating layer is made of silicon dioxide, for example.
In one embodiment of the first or second inventive method, the step a) may include: supplying a first source gas containing silicon and a second source gas containing germanium; and changing a mixture ratio of the first and second source gases with time, thereby setting a germanium concentration in a part of the silicon germanium layer near a lower surface thereof lower than a germanium concentration in the other part of the silicon germanium layer.
In such an embodiment, it is possible to prevent the gate insulating film from decreasing its breakdown strength or changing its characteristics while suppressing decrease in the threshold voltage controllability of the gate electrode.
In another embodiment of the first or second inventive method, the silicon germanium layer may contain boron or phosphorus.
Then, the threshold voltage controllability of the gate electrode can be improved. Also, where the silicon germanium layer contains boron, the boron atoms existing in the silicon germanium layer are activated at a higher rate than in a normal polysilicon film. Thus the boron atoms will even less likely permeate the semiconductor substrate.
In another embodiment, the first or second inventive method may further include the step of implanting boron or phosphorus ions into the silicon germanium layer.
Then, the silicon germanium layer can be doped with boron or phosphorus with certainty.
In an alternative embodiment of the first or second inventive method, the step a) may include supplying a gas containing silicon, a gas containing germanium and a gas containing boron or phosphorus, thereby depositing the silicon germanium layer containing boron or phosphorus.
Then, the silicon germanium layer can also be doped with boron or phosphorus with certainty. In addition, the silicon germanium layer can be doped with boron or phosphorus without performing an ion implantation process thereon. So, the penetration of the boron or phosphorus atoms into the semiconductor substrate, which is usually caused by a channeling phenomenon, does not arise. That is to say, no boron or phosphorus atoms permeate the semiconductor substrate even when an annealing process is carried out after that on the boron or phosphorus ions implanted.
In another embodiment, the first or second inventive method may further include the step of depositing a silicon nitride film over the gate electrode with an insulating layer interposed between the gate electrode and the silicon nitride film.
Then, even though the silicon nitride film has been formed over the gate electrode, any dopant existing in the gate electrode hardly permeates the semiconductor substrate.
In another embodiment of the first or second inventive method, the gate electrode may be used as a gate electrode for at least one of two MOS transistors in a dual-gate MOS device.
Then, it is possible to prevent a dopant introduced into a p+ or n+ gate electrode for one of the two MOS transistors in the dual-gate CMOS device from permeating the semiconductor substrate. Thus, any variation in the characteristics of the dual-gate CMOS device, which might result from a change in dopant concentration in the semiconductor substrate, is suppressible. Also, the bandgap of the silicon germanium layer of the p+ or n+ gate electrode may be changed by controlling a germanium concentration in the silicon germanium layer. And the threshold voltage controllability of the p+ or n+ gate electrode can be improved by changing the bandgap. In that case, the p+ or n+ gate electrode does not have to be doped with any dopant. That is to say, just by controlling the germanium concentration in the silicon germanium layer of the p+ or n+ gate electrode, it is possible to form a dual-gate CMOS device easily while preventing the penetration or permeation of any dopant into the semiconductor substrate.